(Originally published by Cornell University)
June 8, 2010
In the quest for faster and cheaper computers, scientists have imaged pore structures in insulation material at sub-nanometer scales for the first time. Understanding these structures could substantially enhance computer performance and power usage of integrated circuits, say scientists from Cornell and Semiconductor Research Corp. (SRC).
The work was published in the June 2 issue of Applied Physics Letters.
To help maintain the ever-increasing power and performance benefits of semiconductors -- like the speed and memory trend described in Moore's law -- the industry has introduced porous, low dielectric-constant materials to replace silicon dioxide as the insulator between nano-scaled copper wires. This speeds up the electrical signals sent along these copper wires inside a computer chip, and at the same time reduces power consumption.
"Knowing how many of the molecule-sized voids in the carefully engineered Swiss cheese survive in an actual device will greatly affect future designs of integrated circuits," said David Muller, Cornell professor of applied and engineering physics and co-director of the Kavli Institute at Cornell for Nanoscale Science. "The techniques we developed look deeply in and around the structures, to give a much clearer picture so complex processing and integration issues can be addressed."
The scientists now understand that the detailed structure and connectivity of these nanopores have profound control on the mechanical strength, chemical stability and reliability of these materials.
The researchers devised a method to obtain 3-D images of the pores using electron tomography, leveraging imaging advances used for CT scans and MRIs in the medical field, said Scott List, director of interconnect and packaging sciences at SRC, in Research Triangle Park, N.C. "Sophisticated software extracts 3-D images from a series of 2-D images taken at multiple angles. A 2-D picture is worth a thousand words, but a 3-D image at near atomic resolution gives the semiconductor industry new insights into scaling low-k materials for several additional technology nodes."
The authors were Muller; graduate students Huolin Xin and Kevin Hughes; Peter Ercius, Ph.D. '09, now a researcher at Lawrence Berkeley National Laboratory; and James Engstrom, Cornell professor of chemical engineering.
The research was funded by SRC.